the h11av1,a and h11av2,a devices consist of a gallium arsenide infrared emitting diode optically coupled to a monolithic silicon phototransistor detector. ? guaranteed 70 volt v (br)ceo minimum ? ` a ' suffix = 0.40 0 w ide spaced leadform (same as `t' suffix. ) ? t o o r d e r d e v i c e s t h a t a r e t e s t e d a n d m a r k e d p e r v d e 0 8 8 4 r e q u i r e m e n t s , t h e s uf fix ovo must be included at end of part number . vde 0884 is a test option. applications ? general purpose switching circuits ? interfacing and coupling systems of different potentials and impedances ? monitor and detection circuits ? regulation and feedback circuits ? solid state relays maximum ratings (t a = 25 c unless otherwise noted) rating symbol value unit input led reverse voltage v r 6 volts forward current e continuous i f 60 ma led power dissipation @ t a = 25 c with negligible power in output detector derate above 25 c p d 120 1.41 mw mw/ c output transistor collectoremitter voltage v ceo 70 volts emitterbase voltage v ebo 7 volts collectorbase voltage v cbo 70 volts collector current e continuous i c 150 ma detector power dissipation @ t a = 25 c with negligible power in input led derate above 25 c p d 150 1.76 mw mw/ c total device isolation surge voltage (1) (peak ac voltage, 60 hz, 1 sec duration) v iso 7500 vac(pk) total device power dissipation @ t a = 25 c derate above 25 c p d 250 2.94 mw mw/ c ambient operating t emperature rang e t a 55 to +100 c storage t emperature rang e t stg 55 to +150 c soldering temperature (10 sec, 1/16 from case) t l 260 c 1. isolation surge voltage is an internal device dielectric breakdown rating. 1. for this test, pins 1 and 2 are common, and pins 4, 5 and 6 are common. globaloptoisolator ?
schematic standard thru hole pin 1. led anode 2. led cathode 3. n.c. 4. emitter 5. collector 6. base 1 2 3 6 5 4 6 1
electrical characteristics (t a = 25 c unless otherwise noted) (1) characteristic symbol min typ (1) max unit input led forward voltage (i f = 10 ma) t a = 25 c t a = 55 c t a = 100 c v f 0.8 0.9 0.7 1.15 1.3 1.05 1.5 1.7 1.4 volts reverse leakage current (v r = 6 v) i r e e 10 m a capacitance (v = 0 v, f = 1 mhz) c j e 18 e pf output transistor collectoremitter dark current (v ce = 10 v) i ceo e 5 50 na collectorbase dark current (v cb = 10 v) i cbo e 0.5 e na collectoremitter breakdown voltage (i c = 1 ma) v (br)ceo 70 100 e volts collectorbase breakdown voltage (i c = 100 m a) v (br)cbo 70 100 e volts emittercollector breakdown voltage (i e = 100 m a) v (br)eco 7 8 e volts dc current gain (i c = 2 ma, v ce = 10 v) (typical value) h fe e 500 e e collectoremitter capacitance (f = 1 mhz, v ce = 10 v) c ce e 4.5 e pf coupled output collector current (i f = 10 ma, v ce = 10 v) h11av1, h11av1a h11av2, h11av2a i c (ctr) (2) 10 (100) 5 (50) 15 (150) 10 (100) 30 (300) e ma (%) collectoremitter saturation voltage (i c = 2 ma, i f = 20 ma) v ce(sat) e 0.15 0.4 volts turnon time (i c = 2 ma, v cc = 10 v, r l = 100 w ) (3) t on e 5 15 m s turnoff time (i c = 2 ma, v cc = 10 v, r l = 100 w) (3) t off e 4 15 m s isolation voltage (f = 60 hz, t = 1 sec) (4) v iso 7500 e e vac(pk) isolation resistance (v = 500 v) (4) r iso 10 11 e e w isolation capacitance (v = 0 v, f = 1 mhz) (4) c iso e 0.2 0.5 pf 1. always design to the specified minimum/maximum electrical limits (where applicable). 2. current transfer ratio (ctr) = i c /i f x 100%. 3. for test circuit setup and waveforms, refer to figure 1 1. 4. for this test, pins 1 and 2 are common, and pins 4, 5 and 6 are common. i c , output collector current (normalized) typical characteristics figure 1. led forward voltage versus forward current 2 1.8 1.6 1.4 1.2 1 1 10 100 1000 10 1 0.1 0.01 0.5 1 i f , led forward current (ma) 2 5 10 20 50 i f , led input current (ma) v f , forward voltage (volts) 25 c 100 c t a = 55 c normalized to: i f = 10 ma figure 2. output current versus input current pulse only pulse or dc 0.20.1 100 h11av1 , a h11av2 , a
t , turnoff time ( s) off m t , turnon time ( s) on m 10 2 0 figure 3. collector current versus collectoremitter voltage 0 v ce , collectoremitter voltage (volts) 4 6 8 10 12 14 1 2 3 4 5 6 7 8 9 10 5 ma 2 ma 1 ma 7 5 2 1 0.7 0.5 0.2 0.1 60 figure 4. output current versus ambient temperature 40 20 c , output collector current (normalized) 0 20 40 60 80 100 t a , ambient temperature ( c) i i f = 10 ma 0 figure 5. dark current versus ambient temperature 10 1 t a , ambient temperature ( c) i 10 2 10 3 20 40 60 80 100 10 v ceo , collectoremitter dark current (normalized) 10 1 10 0 v ce = 70 v t, time ( s) 100 50 20 10 5 2 1 0.1 0.2 0.5 1 2 5 10 20 50 100 i f , led input current (ma) m t f t r t r t f figure 6. rise and fall times (typical values) r l = 100 r l = 1000 , collector current (ma)i c 30 v 100 50 20 5 2 1 0.1 0.2 0.5 1 2 5 10 20 50 100 i f , led input current (ma) 100 figure 7. turnon switching times r l = 1000 10 10 100 50 20 5 2 1 0.1 0.2 0.5 1 2 5 10 20 50 100 i f , led input current (ma) 100 figure 8. turnoff switching times r l = 1000 10 { { normalized to: v ce = 10 v t a = 25 c normalized to t a = 25 c v cc = 10 v v cc = 10 v v cc = 10 v h11av1 , a h11av2 , a
7 m a 6 m a 5 m a 4 m a 3 m a 2 m a 1 m a 4 3 2 1 0 2 4 6 8 10 12 14 16 18 20 v ce , collectoremitter voltage (volts) i , c 20 18 16 14 12 10 8 6 4 2 0 c ce f = 1 mhz 0.5 0.1 0.2 0.5 1 2 5 10 20 50 v, voltage (volts) figure 9. dc current gain (detector only) c, capacitance (pf) figure 10. capacitances versus voltage test circuit v cc = 10 v input i c r l = 100 w output waveforms 10% 90% t on typical collector current (ma) i b = 8 m a i f = 0 input pulse output pulse t f t off t r figure 11. switching time test circuit and waveforms c led c eb input current adjusted to achieve i c = 2 ma. c cb h11av1 , a h11av2 , a
package dimensions th r u ho le notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. style 1: pin 1. anode 2. cathode 3. nc 4. emitter 5. collector 6. base 6 4 1 3 a b seating plane t 4 pl f k c n g 6 pl d 6 pl e m a m 0.13 (0.005) b m t l m 6 pl j m b m 0.13 (0.005) a m t dim min max min max millimetersinches a 0.320 0.350 8.13 8.89 b 0.240 0.260 6.10 6.60 c 0.115 0.200 2.93 5.08 d 0.016 0.020 0.41 0.50 e 0.040 0.070 1.02 1.77 f 0.010 0.014 0.25 0.36 g 0.100 bsc 2.54 bsc j 0.008 0.012 0.21 0.30 k 0.100 0.150 2.54 3.81 l 0.300 bsc 7.62 bsc m 0 15 0 15 n 0.015 0.100 0.38 2.54 su rf ac e mo un t a b seating plane t j k l 6 pl m b m 0.13 (0.005) a m t c d 6 pl m a m 0.13 (0.005) b m t h g e 6 pl f 4 pl 31 46 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. dim min max min max millimetersinches a 0.320 0.350 8.13 8.89 b 0.240 0.260 6.10 6.60 c 0.115 0.200 2.93 5.08 d 0.016 0.020 0.41 0.50 e 0.040 0.070 1.02 1.77 f 0.010 0.014 0.25 0.36 g 0.100 bsc 2.54 bsc h 0.020 0.025 0.51 0.63 j 0.008 0.012 0.20 0.30 k 0.006 0.035 0.16 0.88 l 0.320 bsc 8.13 bsc s 0.332 0.390 8.43 9.90 h11av1 , a h11av2 , a
notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. 0. 4 " l ea d s pa c in g 6 4 1 3 a b n c k g f 4 pl seating d 6 pl e 6 pl plane t m a m 0.13 (0.005) b m t l j dim min max min max millimetersinches a 0.320 0.350 8.13 8.89 b 0.240 0.260 6.10 6.60 c 0.115 0.200 2.93 5.08 d 0.016 0.020 0.41 0.50 e 0.040 0.070 1.02 1.77 f 0.010 0.014 0.25 0.36 g 0.100 bsc 2.54 bsc j 0.008 0.012 0.21 0.30 k 0.100 0.150 2.54 3.81 l 0.400 0.425 10.16 10.80 n 0.015 0.040 0.38 1.02 h11av1 , a h11av2 , a
life support policy fairchilds products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. www.fairchildsemi.com ? 2000 fairchild semiconductor corporation
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